Handling a "Signal Loop" Error in Xilica Designer Software
Edited
Xilica Designer automatically detects when an internal feedback loop is being created in your design schematic and prevents it from occurring by displaying an error message.
In Conferencing Designs with AEC
When working with conferencing designs that use AEC, you may encounter a signal loop error specifically when wiring the Reference input to the AEC module.
Solution
If this occurs, follow this simple fix:
Locate the HearClear™ Reference Feedback module in the Component Library under the Conferencing category
Insert this module in-line and just upstream from the Reference input to the AEC module
This specialized module prevents the signal loop while maintaining proper reference signal flow to your AEC processing.
